I’m a cryptographer – a person who professionally builds and breaks cryptosystems. Here’s a recent CV with a clickable list of publications.
In September 2018 I joined PQShield Ltd., a University of Oxford spin-out focusing on Post-Quantum Cryptography. I work on various things but I’m mainly responsible for cryptographic hardware IP and the PQSoC Post-Quantum Secure Element.
Current Public Research (2020)
A Hardware Random Number Generator is something that was clearly needed for RISC-V and PQSoC. I worked with the RISC-V Cryptographic Extensions Task Group (Crypto TG) to map out the requirements (FIPS 140-3 etc) and a broader TRNG architecture for RISC-V. We have a new paper out: Building a Modern TRNG: An Entropy Source Interface for RISC-V (with G.R. Newell and B. Marshall).
A lightweight AES and SM4 instruction set extension for RISC-V resides at LWAES ISA. This is an open source design, hardware and software contribution to the RISC-V Foundation, and has been recommended as 32-bit “𝞶3” AES ISE. A short initial report at SECRISC-V: A Lightweight ISA Extension for AES and SM4. A longer report with Crypto TG, covering additional matters such as DPA: The design of scalar AES Instruction Set Extensions for RISC-V (with B. Marshall, G. R. Newell, D. Page, C. Wolf).
Post-Quantum Energy Budgets on Embedded: PQPS is a “lab” for power measurements of PQ crypto – basic research for mobile and IoT security. There is a short write-up on this, published in IEEE MobileCloud 2020: Mobile Energy Requirements of the Upcoming NIST Post-Quantum Cryptography Standards and also on arXiv.